Posts Tagged ‘memory’
ATAD #17 – I/O interface
Communication between the processor and other devices are enabled by an I/O interface, and the Front Side Bus (FSB) is the data transfer bus that carries information between the CPU and the Northbridge (memory controller hub) of the Motherboard.
The I/O interface must have atleast the following features
- Have necessary logic to interpret the device address generated by the processor.
- Handshaking should be implemented by the interface using appropriate commands like (BUSY,READY,WAIT) the processor can communicate with I/O device through the interface.
- If incase different data formated being exchanged; interface must be able to convert serial data to parallel form and vice-versa.
- There must be provision for generating interrupts and the corresponding type numbers for further processing by the processor if required
Further Reading: FSB, Direct Memory Access, Memory Mapped IO, Port Mapped IO
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