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ATAD #21 – Linux process priority range

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The Linux kernel implements two separate priority ranges.

The first is the nice value, a number from –20 to 19 with a default of zero. Larger nice values correspond to a lower priority (you are being nice to the other processes on the system). Processes with a lower nice value (higher priority) run before processes with a higher nice value (lower priority). The nice value also helps determine how long a processor timeslice the process receives. A process with a nice value of –20 receives the maximum timeslice, whereas a process with a nice value of 19 receives the minimum timeslice. Nice values are the standard priority range used in all Unix systems.

The second range is the real-time priority (rtprio). By default, it ranges from zero to 99. All real-time processes are at a higher priority than normal processes. Linux implements real-time priorities in accordance with POSIX.

In order to select a process to run, the Linux scheduler must consider the priority of each process. Actually, there are two kinds of priority:

Static priority
This kind is assigned by the users to real-time processes and ranges from 1 to 99 (highest). It is never changed by the scheduler. The sys_sched_get_priority_max( ) routine returns the static priority of the process, it returns 0 for non-realtime processes.

Dynamic priority
This kind applies only to conventional processes (non realtime processes)

Processes have an initial priority specified as the nice value. This value is stored in the static_prio member of the process’s task_struct. The value is called the static priority because it does not change from what the user specifies. The scheduler, in turn, bases its decisions on the dynamic priority that is stored in prio. The dynamic priority is calculated as a function of the static priority and the task’s interactivity

The static priority of a real-time process is always higher than the dynamic priority of a conventional one: the scheduler will start running conventional processes only when there is no real-time process in a TASK_RUNNING state.

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Do experiment with the ps command

~$ ps -eo pid,rtprio,ni,pri,comm
PID RTPRIO  NI PRI COMMAND
1      -   0  19 init
2      -  -5  24 kthreadd
3     99   - 139 migration/0
4      -  -5  24 ksoftirqd/0

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This scale could probably illustrate priorities better

HIGH PRIORITY – - – - – > – - – - – > – - – - – > – - – - – > – - – – LEAST PRIORITY
……..real time priority (static priority)…….| …. nice value (dynamic priority) …..
99 ……………………….. 50 ……………………… 1 | -20 …….. -10 …….. 0 …….. 10 ……. 19

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Further Reading: Linux Process Scheduler, Linux Process Scheduling

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-vinaydeep

Written by vinaydeep

August 19, 2008 at 7:50 am

ATAD #18 – Unix Standardization

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Software is probably the fastest thing that undergoes change, and its standardization is an important method for both software development and maintenance.

Since its development in 1969, Unix has undergone a lot of changes and has evolved over the years. Here are a few of the efforts towards standardizing Unix.

Probably the first step was in 1980 when BSD 4.1 was developed which included vi, job control and improvements in signals. Subsequently came AT&Ts draft standards which also included TCP/IP networking with BSD4.2 in 1983.

In 1985, AT&T released the System V Interface Definition (SVID) whose description included system calls, C libraries, available programs and devices.

In 1985 Institute of Electrical and Electronic Engineers (IEEE) committee developed a series of standards generally known as POSIX. These went beyond describing merely systems calls and C library facilities; they specified detailed semantics of a shell and a minimum command set, and also detailed bindings for various non-C programming languages. The first release in 1990 was followed by a second edition in 1996.

Key POSIX standards include the following:

  • 1003.1 (released 1990): Library procedures. Described the C system call API, much like Version 7 except for signals and the terminal-control interface.
  • 1003.2 (released 1992): Standard shell and utilities. Shell semantics strongly resemble those of the System V Bourne shell.
  • 1003.4 (released 1993): Real-time Unix. Binary semaphores, process memory locking, memory-mapped files, shared memory, priority scheduling, real-time signals, clocks and timers, IPC message passing, synchronized I/O, asynchronous I/O, real-time files.

And then in 2001, the X/Open (The Open Group) framed the Single UNIX Specification which specified four important things.

  • Base Definitions – a list of definitions and conventions used in the specifications and a list of C header files which must be provided by compliant systems
  • Shell and Utilities – a list of utilities and a description of the shell, sh
  • System Interfaces – a list of available C system calls which must be provided
  • Rationale – the explanation behind the standard

Further Reading: Unix Standards and Specs, Unix Standards

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Written by vinaydeep

August 17, 2008 at 2:11 pm

Posted in ATAD, computing, linux, tech

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ATAD #17 – I/O interface

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Communication between the processor and other devices are enabled by an I/O interface, and the Front Side Bus (FSB) is the data transfer bus that carries information between the CPU and the Northbridge (memory controller hub) of the Motherboard.

The I/O interface must have atleast the following features

  1. Have necessary logic to interpret the device address generated by the processor.
  2. Handshaking should be implemented by the interface using appropriate commands like (BUSY,READY,WAIT) the processor can communicate with I/O device through the interface.
  3. If incase different data formated being exchanged; interface must be able to convert serial data to parallel form and vice-versa.
  4. There must be provision for generating interrupts and the corresponding type numbers for further processing by the processor if required

Further Reading: FSB, Direct Memory Access, Memory Mapped IO, Port Mapped IO

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Written by vinaydeep

August 14, 2008 at 8:13 pm

Posted in ATAD, computing, tech

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ATAD #15 – Beyond the CPU clock speed

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In completing a task the computer splits each instruction into a series of independent steps. The computer that driven by a clock will process an instruction at a time and proceed to the next one in the instruction pipeline when the next clock signal arrives. So naturally, faster the clock speed, the instructions waiting in the pipeline are going to be completed faster. A generic pipeline has four independent steps performed per clock cycle.

  1. Fetch: Read an instruction
  2. Decode and Register Fetch
  3. Execute which might involve memory access
  4. Write Back

(Note: newer processors are buit to perform more than one of the steps in the pipeling during one clock cycle. Eg. the upcoming Intel Nahelm processor can decode upto four instructions at a time)

Processing instructions would need memory access. A CPU Cache is employed here that is simply a very fast memory and that can be accessed in very few cycles. Modern processors adopt cache of different sizes and at various levels or stps of the instruction processing.  A efficient cache design is also pivotal in improving processing speed and clock frequency.

Instruction flow are not just sequential but can brach out based on conditional evaluation and exeution. Sometimes a case might arise where a brach taken will require new instructions to be executed, in which case the pipeline must be stalled or flushed. Modern microachitecure has intruduced techniques such as branch prediction and speculative execution to reduce such penalties.

Processor development and VLSI techniques improvements  like superscalar processor facilitates parallel instruction execution per cycle. The keys to superscalar execution are an instruction fetching unit that can fetch more than one instruction at a time from cache; instruction decoding logic that can decide when instructions are independent and thus executed simultaneously; and sufficient execution units to be able to process several instructions at one time.

Increasing cache size facilitates storing of more instructions which leads to the possibility of Out-of-order execution of instructions while an older instruction waits on the cache, then re-orders the results to make it appear that everything happened in the programmed order.

Other well known concepts are Multiprocessing where two or more CPUs are used in a single computer and Multithreading where thread level and instruction level parallelism is targetted.

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Written by vinaydeep

August 11, 2008 at 7:25 pm

Posted in ATAD, computing, tech

Tagged with , ,

ATAD #14 – The computer architecture

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The conceptual computer architecture can be represented with five abstraction layers with each encompassing a particular set of functionality.

  1. Operating System (OS) and Applications
    - the software component of the computer
  2. Kernel
    - the core component of the OS that manages the system resources and is the lowest abstraction layer for programs
  3. Assember
    - converts high level language statements into machine instructions and data
  4. Firmware
    - a computer program embedded in the hardware that works specifically with that hardware
  5. Hardware
    - the physical components of the computer

This wiki article lists that Computer architecture comprises at least three main subcategories:

  • Instruction set architecture, or ISA, is the abstract image of a computing system that is seen by a machine language (or assembly language) programmer, including the instruction set, memory address modes, processor registers, and address and data formats.
  • Microarchitecture, also known as Computer organization is a lower level, more concrete and detailed, description of the system that involves how the constituent parts of the system are interconnected and how they interoperate in order to implement the ISA.[2] The size of a computer’s cache for instance, is an organizational issue that generally has nothing to do with the ISA.
  • System Design which includes all of the other hardware components within a computing system such as:
    1. system interconnects such as computer buses and switches
    2. memory controllers and hierarchies
    3. CPU off-load mechanisms such as direct memory access
    4. Issues like multi-processing.

We build hardware to make it work for us, and the essence of getting things done is to issue instructions in a language as a medium of communication. Instructions can be written in programming languages that broadly are classified in three categories, high level, assembly and machine language.

High level languages are english like, abstract and more portable across different computers. As we move from high-level languages to lower levels, the code gets harder to read and understand. Machine language that is specific to a CPU and also called native code, is a system of instructions and data directly executed by the CPU. Assembly language is a symbolic representation (using mnemonics defined by the hardware manufacturer, instructions and operands) of the numerical machine codes. The assembler is a utility used to translate machine language into the target computers’ machine code.

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Written by vinaydeep

August 10, 2008 at 6:50 pm

Posted in ATAD, computing, tech

Tagged with , ,